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@ -0,0 +1,79 @@ |
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--- a/src/mips/o32.S
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+++ b/src/mips/o32.S
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@@ -82,13 +82,16 @@ sixteen:
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ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args |
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+#ifndef __mips_soft_float
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bnez t0, pass_d # make it quick for int |
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+#endif
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REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the |
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REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs. |
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REG_L a2, 2*FFI_SIZEOF_ARG($sp) |
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REG_L a3, 3*FFI_SIZEOF_ARG($sp) |
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b call_it |
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+#ifndef __mips_soft_float
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pass_d: |
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bne t0, FFI_ARGS_D, pass_f |
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l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args |
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@@ -130,6 +133,7 @@ pass_f_d:
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# bne t0, FFI_ARGS_F_D, call_it |
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l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args |
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l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float |
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+#endif
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call_it: |
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# Load the function pointer |
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@@ -158,14 +162,23 @@ retfloat:
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bne t2, FFI_TYPE_FLOAT, retdouble |
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jalr t9 |
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REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp) |
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+#ifndef __mips_soft_float
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s.s $f0, 0(t0) |
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+#else
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+ REG_S v0, 0(t0)
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+#endif
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b epilogue |
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retdouble: |
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bne t2, FFI_TYPE_DOUBLE, noretval |
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jalr t9 |
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REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp) |
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+#ifndef __mips_soft_float
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s.d $f0, 0(t0) |
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+#else
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+ REG_S v1, 4(t0)
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+ REG_S v0, 0(t0)
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+#endif
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b epilogue |
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noretval: |
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@@ -261,9 +274,11 @@ $LCFI7:
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li $13, 1 # FFI_O32 |
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bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT |
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+#ifndef __mips_soft_float
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# Store all possible float/double registers. |
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s.d $f12, FA_0_0_OFF2($fp) |
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s.d $f14, FA_1_0_OFF2($fp) |
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+#endif
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1: |
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# Call ffi_closure_mips_inner_O32 to do the work. |
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la t9, ffi_closure_mips_inner_O32 |
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@@ -281,6 +296,7 @@ $LCFI7:
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li $13, 1 # FFI_O32 |
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bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT |
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+#ifndef __mips_soft_float
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li $9, FFI_TYPE_FLOAT |
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l.s $f0, V0_OFF2($fp) |
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beq $8, $9, closure_done |
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@@ -288,6 +304,7 @@ $LCFI7:
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li $9, FFI_TYPE_DOUBLE |
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l.d $f0, V0_OFF2($fp) |
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beq $8, $9, closure_done |
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+#endif
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1: |
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REG_L $3, V1_OFF2($fp) |
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REG_L $2, V0_OFF2($fp) |