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744 lines
25 KiB
744 lines
25 KiB
From 71b7bc88341945f13f3951e2bb5fd247b639ff7a Mon Sep 17 00:00:00 2001
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From: Mike Pall <mike>
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Date: Sun, 3 Sep 2017 23:20:53 +0200
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Subject: [PATCH] PPC: Add soft-float support to JIT compiler backend.
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Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
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Sponsored by Cisco Systems, Inc.
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---
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src/lj_arch.h | 1 -
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src/lj_asm_ppc.h | 321 ++++++++++++++++++++++++++++++++++++++++-------
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2 files changed, 278 insertions(+), 44 deletions(-)
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--- a/src/lj_arch.h
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+++ b/src/lj_arch.h
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@@ -273,7 +273,6 @@
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#endif
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#if LJ_ABI_SOFTFP
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-#define LJ_ARCH_NOJIT 1 /* NYI */
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#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL
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#else
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#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL_SINGLE
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--- a/src/lj_asm_ppc.h
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+++ b/src/lj_asm_ppc.h
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@@ -226,6 +226,7 @@ static void asm_fusexrefx(ASMState *as,
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emit_tab(as, pi, rt, left, right);
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}
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+#if !LJ_SOFTFP
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/* Fuse to multiply-add/sub instruction. */
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static int asm_fusemadd(ASMState *as, IRIns *ir, PPCIns pi, PPCIns pir)
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{
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@@ -245,6 +246,7 @@ static int asm_fusemadd(ASMState *as, IR
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}
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return 0;
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}
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+#endif
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/* -- Calls --------------------------------------------------------------- */
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@@ -253,13 +255,17 @@ static void asm_gencall(ASMState *as, co
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{
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uint32_t n, nargs = CCI_XNARGS(ci);
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int32_t ofs = 8;
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- Reg gpr = REGARG_FIRSTGPR, fpr = REGARG_FIRSTFPR;
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+ Reg gpr = REGARG_FIRSTGPR;
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+#if !LJ_SOFTFP
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+ Reg fpr = REGARG_FIRSTFPR;
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+#endif
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if ((void *)ci->func)
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emit_call(as, (void *)ci->func);
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for (n = 0; n < nargs; n++) { /* Setup args. */
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IRRef ref = args[n];
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if (ref) {
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IRIns *ir = IR(ref);
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+#if !LJ_SOFTFP
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if (irt_isfp(ir->t)) {
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if (fpr <= REGARG_LASTFPR) {
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lua_assert(rset_test(as->freeset, fpr)); /* Already evicted. */
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@@ -271,7 +277,9 @@ static void asm_gencall(ASMState *as, co
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emit_spstore(as, ir, r, ofs);
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ofs += irt_isnum(ir->t) ? 8 : 4;
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}
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- } else {
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+ } else
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+#endif
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+ {
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if (gpr <= REGARG_LASTGPR) {
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lua_assert(rset_test(as->freeset, gpr)); /* Already evicted. */
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ra_leftov(as, gpr, ref);
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@@ -290,8 +298,10 @@ static void asm_gencall(ASMState *as, co
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}
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checkmclim(as);
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}
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+#if !LJ_SOFTFP
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if ((ci->flags & CCI_VARARG)) /* Vararg calls need to know about FPR use. */
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emit_tab(as, fpr == REGARG_FIRSTFPR ? PPCI_CRXOR : PPCI_CREQV, 6, 6, 6);
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+#endif
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}
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/* Setup result reg/sp for call. Evict scratch regs. */
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@@ -299,8 +309,10 @@ static void asm_setupresult(ASMState *as
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{
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RegSet drop = RSET_SCRATCH;
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int hiop = ((ir+1)->o == IR_HIOP && !irt_isnil((ir+1)->t));
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+#if !LJ_SOFTFP
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if ((ci->flags & CCI_NOFPRCLOBBER))
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drop &= ~RSET_FPR;
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+#endif
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if (ra_hasreg(ir->r))
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rset_clear(drop, ir->r); /* Dest reg handled below. */
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if (hiop && ra_hasreg((ir+1)->r))
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@@ -308,7 +320,7 @@ static void asm_setupresult(ASMState *as
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ra_evictset(as, drop); /* Evictions must be performed first. */
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if (ra_used(ir)) {
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lua_assert(!irt_ispri(ir->t));
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- if (irt_isfp(ir->t)) {
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+ if (!LJ_SOFTFP && irt_isfp(ir->t)) {
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if ((ci->flags & CCI_CASTU64)) {
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/* Use spill slot or temp slots. */
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int32_t ofs = ir->s ? sps_scale(ir->s) : SPOFS_TMP;
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@@ -377,6 +389,7 @@ static void asm_retf(ASMState *as, IRIns
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/* -- Type conversions ---------------------------------------------------- */
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+#if !LJ_SOFTFP
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static void asm_tointg(ASMState *as, IRIns *ir, Reg left)
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{
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RegSet allow = RSET_FPR;
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@@ -409,15 +422,23 @@ static void asm_tobit(ASMState *as, IRIn
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emit_fai(as, PPCI_STFD, tmp, RID_SP, SPOFS_TMP);
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emit_fab(as, PPCI_FADD, tmp, left, right);
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}
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+#endif
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static void asm_conv(ASMState *as, IRIns *ir)
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{
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IRType st = (IRType)(ir->op2 & IRCONV_SRCMASK);
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+#if !LJ_SOFTFP
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int stfp = (st == IRT_NUM || st == IRT_FLOAT);
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+#endif
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IRRef lref = ir->op1;
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- lua_assert(irt_type(ir->t) != st);
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lua_assert(!(irt_isint64(ir->t) ||
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(st == IRT_I64 || st == IRT_U64))); /* Handled by SPLIT. */
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+#if LJ_SOFTFP
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+ /* FP conversions are handled by SPLIT. */
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+ lua_assert(!irt_isfp(ir->t) && !(st == IRT_NUM || st == IRT_FLOAT));
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+ /* Can't check for same types: SPLIT uses CONV int.int + BXOR for sfp NEG. */
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+#else
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+ lua_assert(irt_type(ir->t) != st);
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if (irt_isfp(ir->t)) {
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Reg dest = ra_dest(as, ir, RSET_FPR);
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if (stfp) { /* FP to FP conversion. */
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@@ -476,7 +497,9 @@ static void asm_conv(ASMState *as, IRIns
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emit_fb(as, PPCI_FCTIWZ, tmp, left);
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}
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}
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- } else {
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+ } else
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+#endif
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+ {
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Reg dest = ra_dest(as, ir, RSET_GPR);
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if (st >= IRT_I8 && st <= IRT_U16) { /* Extend to 32 bit integer. */
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Reg left = ra_alloc1(as, ir->op1, RSET_GPR);
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@@ -496,17 +519,41 @@ static void asm_strto(ASMState *as, IRIn
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{
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const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_strscan_num];
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IRRef args[2];
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- int32_t ofs;
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+ int32_t ofs = SPOFS_TMP;
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+#if LJ_SOFTFP
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+ ra_evictset(as, RSET_SCRATCH);
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+ if (ra_used(ir)) {
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+ if (ra_hasspill(ir->s) && ra_hasspill((ir+1)->s) &&
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+ (ir->s & 1) == LJ_BE && (ir->s ^ 1) == (ir+1)->s) {
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+ int i;
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+ for (i = 0; i < 2; i++) {
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+ Reg r = (ir+i)->r;
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+ if (ra_hasreg(r)) {
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+ ra_free(as, r);
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+ ra_modified(as, r);
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+ emit_spload(as, ir+i, r, sps_scale((ir+i)->s));
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+ }
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+ }
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+ ofs = sps_scale(ir->s & ~1);
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+ } else {
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+ Reg rhi = ra_dest(as, ir+1, RSET_GPR);
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+ Reg rlo = ra_dest(as, ir, rset_exclude(RSET_GPR, rhi));
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+ emit_tai(as, PPCI_LWZ, rhi, RID_SP, ofs);
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+ emit_tai(as, PPCI_LWZ, rlo, RID_SP, ofs+4);
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+ }
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+ }
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+#else
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RegSet drop = RSET_SCRATCH;
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if (ra_hasreg(ir->r)) rset_set(drop, ir->r); /* Spill dest reg (if any). */
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ra_evictset(as, drop);
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+ if (ir->s) ofs = sps_scale(ir->s);
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+#endif
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asm_guardcc(as, CC_EQ);
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emit_ai(as, PPCI_CMPWI, RID_RET, 0); /* Test return status. */
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args[0] = ir->op1; /* GCstr *str */
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args[1] = ASMREF_TMP1; /* TValue *n */
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asm_gencall(as, ci, args);
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/* Store the result to the spill slot or temp slots. */
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- ofs = ir->s ? sps_scale(ir->s) : SPOFS_TMP;
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emit_tai(as, PPCI_ADDI, ra_releasetmp(as, ASMREF_TMP1), RID_SP, ofs);
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}
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@@ -530,7 +577,10 @@ static void asm_tvptr(ASMState *as, Reg
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Reg src = ra_alloc1(as, ref, allow);
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emit_setgl(as, src, tmptv.gcr);
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}
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- type = ra_allock(as, irt_toitype(ir->t), allow);
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+ if (LJ_SOFTFP && (ir+1)->o == IR_HIOP)
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+ type = ra_alloc1(as, ref+1, allow);
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+ else
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+ type = ra_allock(as, irt_toitype(ir->t), allow);
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emit_setgl(as, type, tmptv.it);
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}
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}
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@@ -574,11 +624,27 @@ static void asm_href(ASMState *as, IRIns
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Reg tisnum = RID_NONE, tmpnum = RID_NONE;
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IRRef refkey = ir->op2;
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IRIns *irkey = IR(refkey);
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+ int isk = irref_isk(refkey);
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IRType1 kt = irkey->t;
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uint32_t khash;
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MCLabel l_end, l_loop, l_next;
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rset_clear(allow, tab);
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+#if LJ_SOFTFP
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+ if (!isk) {
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+ key = ra_alloc1(as, refkey, allow);
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+ rset_clear(allow, key);
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+ if (irkey[1].o == IR_HIOP) {
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+ if (ra_hasreg((irkey+1)->r)) {
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+ tmpnum = (irkey+1)->r;
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+ ra_noweak(as, tmpnum);
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+ } else {
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+ tmpnum = ra_allocref(as, refkey+1, allow);
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+ }
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+ rset_clear(allow, tmpnum);
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+ }
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+ }
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+#else
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if (irt_isnum(kt)) {
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key = ra_alloc1(as, refkey, RSET_FPR);
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tmpnum = ra_scratch(as, rset_exclude(RSET_FPR, key));
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@@ -588,6 +654,7 @@ static void asm_href(ASMState *as, IRIns
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key = ra_alloc1(as, refkey, allow);
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rset_clear(allow, key);
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}
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+#endif
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tmp2 = ra_scratch(as, allow);
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rset_clear(allow, tmp2);
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@@ -610,7 +677,7 @@ static void asm_href(ASMState *as, IRIns
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asm_guardcc(as, CC_EQ);
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else
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emit_condbranch(as, PPCI_BC|PPCF_Y, CC_EQ, l_end);
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- if (irt_isnum(kt)) {
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+ if (!LJ_SOFTFP && irt_isnum(kt)) {
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emit_fab(as, PPCI_FCMPU, 0, tmpnum, key);
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emit_condbranch(as, PPCI_BC, CC_GE, l_next);
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emit_ab(as, PPCI_CMPLW, tmp1, tisnum);
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@@ -620,7 +687,10 @@ static void asm_href(ASMState *as, IRIns
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emit_ab(as, PPCI_CMPW, tmp2, key);
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emit_condbranch(as, PPCI_BC, CC_NE, l_next);
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}
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- emit_ai(as, PPCI_CMPWI, tmp1, irt_toitype(irkey->t));
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+ if (LJ_SOFTFP && ra_hasreg(tmpnum))
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+ emit_ab(as, PPCI_CMPW, tmp1, tmpnum);
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+ else
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+ emit_ai(as, PPCI_CMPWI, tmp1, irt_toitype(irkey->t));
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if (!irt_ispri(kt))
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emit_tai(as, PPCI_LWZ, tmp2, dest, (int32_t)offsetof(Node, key.gcr));
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}
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@@ -629,19 +699,19 @@ static void asm_href(ASMState *as, IRIns
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(((char *)as->mcp-(char *)l_loop) & 0xffffu);
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/* Load main position relative to tab->node into dest. */
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- khash = irref_isk(refkey) ? ir_khash(irkey) : 1;
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+ khash = isk ? ir_khash(irkey) : 1;
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if (khash == 0) {
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emit_tai(as, PPCI_LWZ, dest, tab, (int32_t)offsetof(GCtab, node));
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} else {
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Reg tmphash = tmp1;
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- if (irref_isk(refkey))
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+ if (isk)
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tmphash = ra_allock(as, khash, allow);
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emit_tab(as, PPCI_ADD, dest, dest, tmp1);
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emit_tai(as, PPCI_MULLI, tmp1, tmp1, sizeof(Node));
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emit_asb(as, PPCI_AND, tmp1, tmp2, tmphash);
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emit_tai(as, PPCI_LWZ, dest, tab, (int32_t)offsetof(GCtab, node));
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emit_tai(as, PPCI_LWZ, tmp2, tab, (int32_t)offsetof(GCtab, hmask));
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- if (irref_isk(refkey)) {
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+ if (isk) {
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/* Nothing to do. */
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} else if (irt_isstr(kt)) {
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emit_tai(as, PPCI_LWZ, tmp1, key, (int32_t)offsetof(GCstr, hash));
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@@ -651,13 +721,19 @@ static void asm_href(ASMState *as, IRIns
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emit_asb(as, PPCI_XOR, tmp1, tmp1, tmp2);
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emit_rotlwi(as, tmp1, tmp1, (HASH_ROT2+HASH_ROT1)&31);
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emit_tab(as, PPCI_SUBF, tmp2, dest, tmp2);
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- if (irt_isnum(kt)) {
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+ if (LJ_SOFTFP ? (irkey[1].o == IR_HIOP) : irt_isnum(kt)) {
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+#if LJ_SOFTFP
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+ emit_asb(as, PPCI_XOR, tmp2, key, tmp1);
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+ emit_rotlwi(as, dest, tmp1, HASH_ROT1);
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+ emit_tab(as, PPCI_ADD, tmp1, tmpnum, tmpnum);
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+#else
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int32_t ofs = ra_spill(as, irkey);
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emit_asb(as, PPCI_XOR, tmp2, tmp2, tmp1);
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emit_rotlwi(as, dest, tmp1, HASH_ROT1);
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emit_tab(as, PPCI_ADD, tmp1, tmp1, tmp1);
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emit_tai(as, PPCI_LWZ, tmp2, RID_SP, ofs+4);
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emit_tai(as, PPCI_LWZ, tmp1, RID_SP, ofs);
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+#endif
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} else {
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emit_asb(as, PPCI_XOR, tmp2, key, tmp1);
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emit_rotlwi(as, dest, tmp1, HASH_ROT1);
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@@ -784,8 +860,8 @@ static PPCIns asm_fxloadins(IRIns *ir)
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case IRT_U8: return PPCI_LBZ;
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case IRT_I16: return PPCI_LHA;
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case IRT_U16: return PPCI_LHZ;
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- case IRT_NUM: return PPCI_LFD;
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- case IRT_FLOAT: return PPCI_LFS;
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+ case IRT_NUM: lua_assert(!LJ_SOFTFP); return PPCI_LFD;
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+ case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_LFS;
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default: return PPCI_LWZ;
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}
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}
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@@ -795,8 +871,8 @@ static PPCIns asm_fxstoreins(IRIns *ir)
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switch (irt_type(ir->t)) {
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case IRT_I8: case IRT_U8: return PPCI_STB;
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case IRT_I16: case IRT_U16: return PPCI_STH;
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- case IRT_NUM: return PPCI_STFD;
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- case IRT_FLOAT: return PPCI_STFS;
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+ case IRT_NUM: lua_assert(!LJ_SOFTFP); return PPCI_STFD;
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+ case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_STFS;
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default: return PPCI_STW;
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}
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}
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@@ -839,7 +915,8 @@ static void asm_fstore(ASMState *as, IRI
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static void asm_xload(ASMState *as, IRIns *ir)
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{
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- Reg dest = ra_dest(as, ir, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR);
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+ Reg dest = ra_dest(as, ir,
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+ (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR);
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lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED));
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if (irt_isi8(ir->t))
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emit_as(as, PPCI_EXTSB, dest, dest);
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@@ -857,7 +934,8 @@ static void asm_xstore_(ASMState *as, IR
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Reg src = ra_alloc1(as, irb->op1, RSET_GPR);
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asm_fusexrefx(as, PPCI_STWBRX, src, ir->op1, rset_exclude(RSET_GPR, src));
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} else {
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- Reg src = ra_alloc1(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR);
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+ Reg src = ra_alloc1(as, ir->op2,
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+ (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR);
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asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1,
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rset_exclude(RSET_GPR, src), ofs);
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}
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@@ -871,10 +949,19 @@ static void asm_ahuvload(ASMState *as, I
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Reg dest = RID_NONE, type = RID_TMP, tmp = RID_TMP, idx;
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RegSet allow = RSET_GPR;
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int32_t ofs = AHUREF_LSX;
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+ if (LJ_SOFTFP && (ir+1)->o == IR_HIOP) {
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+ t.irt = IRT_NUM;
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+ if (ra_used(ir+1)) {
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+ type = ra_dest(as, ir+1, allow);
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+ rset_clear(allow, type);
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+ }
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+ ofs = 0;
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+ }
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if (ra_used(ir)) {
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- lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t));
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- if (!irt_isnum(t)) ofs = 0;
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- dest = ra_dest(as, ir, irt_isnum(t) ? RSET_FPR : RSET_GPR);
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+ lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) ||
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+ irt_isint(ir->t) || irt_isaddr(ir->t));
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+ if (LJ_SOFTFP || !irt_isnum(t)) ofs = 0;
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+ dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow);
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rset_clear(allow, dest);
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}
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idx = asm_fuseahuref(as, ir->op1, &ofs, allow);
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@@ -883,12 +970,13 @@ static void asm_ahuvload(ASMState *as, I
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asm_guardcc(as, CC_GE);
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emit_ab(as, PPCI_CMPLW, type, tisnum);
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if (ra_hasreg(dest)) {
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- if (ofs == AHUREF_LSX) {
|
|
+ if (!LJ_SOFTFP && ofs == AHUREF_LSX) {
|
|
tmp = ra_scratch(as, rset_exclude(rset_exclude(RSET_GPR,
|
|
(idx&255)), (idx>>8)));
|
|
emit_fab(as, PPCI_LFDX, dest, (idx&255), tmp);
|
|
} else {
|
|
- emit_fai(as, PPCI_LFD, dest, idx, ofs);
|
|
+ emit_fai(as, LJ_SOFTFP ? PPCI_LWZ : PPCI_LFD, dest, idx,
|
|
+ ofs+4*LJ_SOFTFP);
|
|
}
|
|
}
|
|
} else {
|
|
@@ -911,7 +999,7 @@ static void asm_ahustore(ASMState *as, I
|
|
int32_t ofs = AHUREF_LSX;
|
|
if (ir->r == RID_SINK)
|
|
return;
|
|
- if (irt_isnum(ir->t)) {
|
|
+ if (!LJ_SOFTFP && irt_isnum(ir->t)) {
|
|
src = ra_alloc1(as, ir->op2, RSET_FPR);
|
|
} else {
|
|
if (!irt_ispri(ir->t)) {
|
|
@@ -919,11 +1007,14 @@ static void asm_ahustore(ASMState *as, I
|
|
rset_clear(allow, src);
|
|
ofs = 0;
|
|
}
|
|
- type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow);
|
|
+ if (LJ_SOFTFP && (ir+1)->o == IR_HIOP)
|
|
+ type = ra_alloc1(as, (ir+1)->op2, allow);
|
|
+ else
|
|
+ type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow);
|
|
rset_clear(allow, type);
|
|
}
|
|
idx = asm_fuseahuref(as, ir->op1, &ofs, allow);
|
|
- if (irt_isnum(ir->t)) {
|
|
+ if (!LJ_SOFTFP && irt_isnum(ir->t)) {
|
|
if (ofs == AHUREF_LSX) {
|
|
emit_fab(as, PPCI_STFDX, src, (idx&255), RID_TMP);
|
|
emit_slwi(as, RID_TMP, (idx>>8), 3);
|
|
@@ -948,21 +1039,33 @@ static void asm_sload(ASMState *as, IRIn
|
|
IRType1 t = ir->t;
|
|
Reg dest = RID_NONE, type = RID_NONE, base;
|
|
RegSet allow = RSET_GPR;
|
|
+ int hiop = (LJ_SOFTFP && (ir+1)->o == IR_HIOP);
|
|
+ if (hiop)
|
|
+ t.irt = IRT_NUM;
|
|
lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */
|
|
- lua_assert(irt_isguard(t) || !(ir->op2 & IRSLOAD_TYPECHECK));
|
|
+ lua_assert(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK));
|
|
lua_assert(LJ_DUALNUM ||
|
|
!irt_isint(t) || (ir->op2 & (IRSLOAD_CONVERT|IRSLOAD_FRAME)));
|
|
+#if LJ_SOFTFP
|
|
+ lua_assert(!(ir->op2 & IRSLOAD_CONVERT)); /* Handled by LJ_SOFTFP SPLIT. */
|
|
+ if (hiop && ra_used(ir+1)) {
|
|
+ type = ra_dest(as, ir+1, allow);
|
|
+ rset_clear(allow, type);
|
|
+ }
|
|
+#else
|
|
if ((ir->op2 & IRSLOAD_CONVERT) && irt_isguard(t) && irt_isint(t)) {
|
|
dest = ra_scratch(as, RSET_FPR);
|
|
asm_tointg(as, ir, dest);
|
|
t.irt = IRT_NUM; /* Continue with a regular number type check. */
|
|
- } else if (ra_used(ir)) {
|
|
+ } else
|
|
+#endif
|
|
+ if (ra_used(ir)) {
|
|
lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t));
|
|
- dest = ra_dest(as, ir, irt_isnum(t) ? RSET_FPR : RSET_GPR);
|
|
+ dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow);
|
|
rset_clear(allow, dest);
|
|
base = ra_alloc1(as, REF_BASE, allow);
|
|
rset_clear(allow, base);
|
|
- if ((ir->op2 & IRSLOAD_CONVERT)) {
|
|
+ if (!LJ_SOFTFP && (ir->op2 & IRSLOAD_CONVERT)) {
|
|
if (irt_isint(t)) {
|
|
emit_tai(as, PPCI_LWZ, dest, RID_SP, SPOFS_TMPLO);
|
|
dest = ra_scratch(as, RSET_FPR);
|
|
@@ -994,10 +1097,13 @@ dotypecheck:
|
|
if ((ir->op2 & IRSLOAD_TYPECHECK)) {
|
|
Reg tisnum = ra_allock(as, (int32_t)LJ_TISNUM, allow);
|
|
asm_guardcc(as, CC_GE);
|
|
- emit_ab(as, PPCI_CMPLW, RID_TMP, tisnum);
|
|
+#if !LJ_SOFTFP
|
|
type = RID_TMP;
|
|
+#endif
|
|
+ emit_ab(as, PPCI_CMPLW, type, tisnum);
|
|
}
|
|
- if (ra_hasreg(dest)) emit_fai(as, PPCI_LFD, dest, base, ofs-4);
|
|
+ if (ra_hasreg(dest)) emit_fai(as, LJ_SOFTFP ? PPCI_LWZ : PPCI_LFD, dest,
|
|
+ base, ofs-(LJ_SOFTFP?0:4));
|
|
} else {
|
|
if ((ir->op2 & IRSLOAD_TYPECHECK)) {
|
|
asm_guardcc(as, CC_NE);
|
|
@@ -1119,6 +1225,7 @@ static void asm_obar(ASMState *as, IRIns
|
|
|
|
/* -- Arithmetic and logic operations ------------------------------------- */
|
|
|
|
+#if !LJ_SOFTFP
|
|
static void asm_fparith(ASMState *as, IRIns *ir, PPCIns pi)
|
|
{
|
|
Reg dest = ra_dest(as, ir, RSET_FPR);
|
|
@@ -1146,13 +1253,17 @@ static void asm_fpmath(ASMState *as, IRI
|
|
else
|
|
asm_callid(as, ir, IRCALL_lj_vm_floor + ir->op2);
|
|
}
|
|
+#endif
|
|
|
|
static void asm_add(ASMState *as, IRIns *ir)
|
|
{
|
|
+#if !LJ_SOFTFP
|
|
if (irt_isnum(ir->t)) {
|
|
if (!asm_fusemadd(as, ir, PPCI_FMADD, PPCI_FMADD))
|
|
asm_fparith(as, ir, PPCI_FADD);
|
|
- } else {
|
|
+ } else
|
|
+#endif
|
|
+ {
|
|
Reg dest = ra_dest(as, ir, RSET_GPR);
|
|
Reg right, left = ra_hintalloc(as, ir->op1, dest, RSET_GPR);
|
|
PPCIns pi;
|
|
@@ -1191,10 +1302,13 @@ static void asm_add(ASMState *as, IRIns
|
|
|
|
static void asm_sub(ASMState *as, IRIns *ir)
|
|
{
|
|
+#if !LJ_SOFTFP
|
|
if (irt_isnum(ir->t)) {
|
|
if (!asm_fusemadd(as, ir, PPCI_FMSUB, PPCI_FNMSUB))
|
|
asm_fparith(as, ir, PPCI_FSUB);
|
|
- } else {
|
|
+ } else
|
|
+#endif
|
|
+ {
|
|
PPCIns pi = PPCI_SUBF;
|
|
Reg dest = ra_dest(as, ir, RSET_GPR);
|
|
Reg left, right;
|
|
@@ -1220,9 +1334,12 @@ static void asm_sub(ASMState *as, IRIns
|
|
|
|
static void asm_mul(ASMState *as, IRIns *ir)
|
|
{
|
|
+#if !LJ_SOFTFP
|
|
if (irt_isnum(ir->t)) {
|
|
asm_fparith(as, ir, PPCI_FMUL);
|
|
- } else {
|
|
+ } else
|
|
+#endif
|
|
+ {
|
|
PPCIns pi = PPCI_MULLW;
|
|
Reg dest = ra_dest(as, ir, RSET_GPR);
|
|
Reg right, left = ra_hintalloc(as, ir->op1, dest, RSET_GPR);
|
|
@@ -1250,9 +1367,12 @@ static void asm_mul(ASMState *as, IRIns
|
|
|
|
static void asm_neg(ASMState *as, IRIns *ir)
|
|
{
|
|
+#if !LJ_SOFTFP
|
|
if (irt_isnum(ir->t)) {
|
|
asm_fpunary(as, ir, PPCI_FNEG);
|
|
- } else {
|
|
+ } else
|
|
+#endif
|
|
+ {
|
|
Reg dest, left;
|
|
PPCIns pi = PPCI_NEG;
|
|
if (as->flagmcp == as->mcp) {
|
|
@@ -1563,9 +1683,40 @@ static void asm_bitshift(ASMState *as, I
|
|
PPCI_RLWINM|PPCF_MB(0)|PPCF_ME(31))
|
|
#define asm_bror(as, ir) lua_assert(0)
|
|
|
|
+#if LJ_SOFTFP
|
|
+static void asm_sfpmin_max(ASMState *as, IRIns *ir)
|
|
+{
|
|
+ CCallInfo ci = lj_ir_callinfo[IRCALL_softfp_cmp];
|
|
+ IRRef args[4];
|
|
+ MCLabel l_right, l_end;
|
|
+ Reg desthi = ra_dest(as, ir, RSET_GPR), destlo = ra_dest(as, ir+1, RSET_GPR);
|
|
+ Reg righthi, lefthi = ra_alloc2(as, ir, RSET_GPR);
|
|
+ Reg rightlo, leftlo = ra_alloc2(as, ir+1, RSET_GPR);
|
|
+ PPCCC cond = (IROp)ir->o == IR_MIN ? CC_EQ : CC_NE;
|
|
+ righthi = (lefthi >> 8); lefthi &= 255;
|
|
+ rightlo = (leftlo >> 8); leftlo &= 255;
|
|
+ args[0^LJ_BE] = ir->op1; args[1^LJ_BE] = (ir+1)->op1;
|
|
+ args[2^LJ_BE] = ir->op2; args[3^LJ_BE] = (ir+1)->op2;
|
|
+ l_end = emit_label(as);
|
|
+ if (desthi != righthi) emit_mr(as, desthi, righthi);
|
|
+ if (destlo != rightlo) emit_mr(as, destlo, rightlo);
|
|
+ l_right = emit_label(as);
|
|
+ if (l_end != l_right) emit_jmp(as, l_end);
|
|
+ if (desthi != lefthi) emit_mr(as, desthi, lefthi);
|
|
+ if (destlo != leftlo) emit_mr(as, destlo, leftlo);
|
|
+ if (l_right == as->mcp+1) {
|
|
+ cond ^= 4; l_right = l_end; ++as->mcp;
|
|
+ }
|
|
+ emit_condbranch(as, PPCI_BC, cond, l_right);
|
|
+ ra_evictset(as, RSET_SCRATCH);
|
|
+ emit_cmpi(as, RID_RET, 1);
|
|
+ asm_gencall(as, &ci, args);
|
|
+}
|
|
+#endif
|
|
+
|
|
static void asm_min_max(ASMState *as, IRIns *ir, int ismax)
|
|
{
|
|
- if (irt_isnum(ir->t)) {
|
|
+ if (!LJ_SOFTFP && irt_isnum(ir->t)) {
|
|
Reg dest = ra_dest(as, ir, RSET_FPR);
|
|
Reg tmp = dest;
|
|
Reg right, left = ra_alloc2(as, ir, RSET_FPR);
|
|
@@ -1653,7 +1804,7 @@ static void asm_intcomp_(ASMState *as, I
|
|
static void asm_comp(ASMState *as, IRIns *ir)
|
|
{
|
|
PPCCC cc = asm_compmap[ir->o];
|
|
- if (irt_isnum(ir->t)) {
|
|
+ if (!LJ_SOFTFP && irt_isnum(ir->t)) {
|
|
Reg right, left = ra_alloc2(as, ir, RSET_FPR);
|
|
right = (left >> 8); left &= 255;
|
|
asm_guardcc(as, (cc >> 4));
|
|
@@ -1674,6 +1825,44 @@ static void asm_comp(ASMState *as, IRIns
|
|
|
|
#define asm_equal(as, ir) asm_comp(as, ir)
|
|
|
|
+#if LJ_SOFTFP
|
|
+/* SFP comparisons. */
|
|
+static void asm_sfpcomp(ASMState *as, IRIns *ir)
|
|
+{
|
|
+ const CCallInfo *ci = &lj_ir_callinfo[IRCALL_softfp_cmp];
|
|
+ RegSet drop = RSET_SCRATCH;
|
|
+ Reg r;
|
|
+ IRRef args[4];
|
|
+ args[0^LJ_BE] = ir->op1; args[1^LJ_BE] = (ir+1)->op1;
|
|
+ args[2^LJ_BE] = ir->op2; args[3^LJ_BE] = (ir+1)->op2;
|
|
+
|
|
+ for (r = REGARG_FIRSTGPR; r <= REGARG_FIRSTGPR+3; r++) {
|
|
+ if (!rset_test(as->freeset, r) &&
|
|
+ regcost_ref(as->cost[r]) == args[r-REGARG_FIRSTGPR])
|
|
+ rset_clear(drop, r);
|
|
+ }
|
|
+ ra_evictset(as, drop);
|
|
+ asm_setupresult(as, ir, ci);
|
|
+ switch ((IROp)ir->o) {
|
|
+ case IR_ULT:
|
|
+ asm_guardcc(as, CC_EQ);
|
|
+ emit_ai(as, PPCI_CMPWI, RID_RET, 0);
|
|
+ case IR_ULE:
|
|
+ asm_guardcc(as, CC_EQ);
|
|
+ emit_ai(as, PPCI_CMPWI, RID_RET, 1);
|
|
+ break;
|
|
+ case IR_GE: case IR_GT:
|
|
+ asm_guardcc(as, CC_EQ);
|
|
+ emit_ai(as, PPCI_CMPWI, RID_RET, 2);
|
|
+ default:
|
|
+ asm_guardcc(as, (asm_compmap[ir->o] & 0xf));
|
|
+ emit_ai(as, PPCI_CMPWI, RID_RET, 0);
|
|
+ break;
|
|
+ }
|
|
+ asm_gencall(as, ci, args);
|
|
+}
|
|
+#endif
|
|
+
|
|
#if LJ_HASFFI
|
|
/* 64 bit integer comparisons. */
|
|
static void asm_comp64(ASMState *as, IRIns *ir)
|
|
@@ -1703,19 +1892,36 @@ static void asm_comp64(ASMState *as, IRI
|
|
/* Hiword op of a split 64 bit op. Previous op must be the loword op. */
|
|
static void asm_hiop(ASMState *as, IRIns *ir)
|
|
{
|
|
-#if LJ_HASFFI
|
|
+#if LJ_HASFFI || LJ_SOFTFP
|
|
/* HIOP is marked as a store because it needs its own DCE logic. */
|
|
int uselo = ra_used(ir-1), usehi = ra_used(ir); /* Loword/hiword used? */
|
|
if (LJ_UNLIKELY(!(as->flags & JIT_F_OPT_DCE))) uselo = usehi = 1;
|
|
if ((ir-1)->o == IR_CONV) { /* Conversions to/from 64 bit. */
|
|
as->curins--; /* Always skip the CONV. */
|
|
+#if LJ_HASFFI && !LJ_SOFTFP
|
|
if (usehi || uselo)
|
|
asm_conv64(as, ir);
|
|
return;
|
|
+#endif
|
|
} else if ((ir-1)->o <= IR_NE) { /* 64 bit integer comparisons. ORDER IR. */
|
|
as->curins--; /* Always skip the loword comparison. */
|
|
+#if LJ_SOFTFP
|
|
+ if (!irt_isint(ir->t)) {
|
|
+ asm_sfpcomp(as, ir-1);
|
|
+ return;
|
|
+ }
|
|
+#endif
|
|
+#if LJ_HASFFI
|
|
asm_comp64(as, ir);
|
|
+#endif
|
|
+ return;
|
|
+#if LJ_SOFTFP
|
|
+ } else if ((ir-1)->o == IR_MIN || (ir-1)->o == IR_MAX) {
|
|
+ as->curins--; /* Always skip the loword min/max. */
|
|
+ if (uselo || usehi)
|
|
+ asm_sfpmin_max(as, ir-1);
|
|
return;
|
|
+#endif
|
|
} else if ((ir-1)->o == IR_XSTORE) {
|
|
as->curins--; /* Handle both stores here. */
|
|
if ((ir-1)->r != RID_SINK) {
|
|
@@ -1726,14 +1932,27 @@ static void asm_hiop(ASMState *as, IRIns
|
|
}
|
|
if (!usehi) return; /* Skip unused hiword op for all remaining ops. */
|
|
switch ((ir-1)->o) {
|
|
+#if LJ_HASFFI
|
|
case IR_ADD: as->curins--; asm_add64(as, ir); break;
|
|
case IR_SUB: as->curins--; asm_sub64(as, ir); break;
|
|
case IR_NEG: as->curins--; asm_neg64(as, ir); break;
|
|
+#endif
|
|
+#if LJ_SOFTFP
|
|
+ case IR_SLOAD: case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD:
|
|
+ case IR_STRTO:
|
|
+ if (!uselo)
|
|
+ ra_allocref(as, ir->op1, RSET_GPR); /* Mark lo op as used. */
|
|
+ break;
|
|
+#endif
|
|
case IR_CALLN:
|
|
+ case IR_CALLS:
|
|
case IR_CALLXS:
|
|
if (!uselo)
|
|
ra_allocref(as, ir->op1, RID2RSET(RID_RETLO)); /* Mark lo op as used. */
|
|
break;
|
|
+#if LJ_SOFTFP
|
|
+ case IR_ASTORE: case IR_HSTORE: case IR_USTORE: case IR_TOSTR:
|
|
+#endif
|
|
case IR_CNEWI:
|
|
/* Nothing to do here. Handled by lo op itself. */
|
|
break;
|
|
@@ -1797,8 +2016,19 @@ static void asm_stack_restore(ASMState *
|
|
if ((sn & SNAP_NORESTORE))
|
|
continue;
|
|
if (irt_isnum(ir->t)) {
|
|
+#if LJ_SOFTFP
|
|
+ Reg tmp;
|
|
+ RegSet allow = rset_exclude(RSET_GPR, RID_BASE);
|
|
+ lua_assert(irref_isk(ref)); /* LJ_SOFTFP: must be a number constant. */
|
|
+ tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.lo, allow);
|
|
+ emit_tai(as, PPCI_STW, tmp, RID_BASE, ofs+(LJ_BE?4:0));
|
|
+ if (rset_test(as->freeset, tmp+1)) allow = RID2RSET(tmp+1);
|
|
+ tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.hi, allow);
|
|
+ emit_tai(as, PPCI_STW, tmp, RID_BASE, ofs+(LJ_BE?0:4));
|
|
+#else
|
|
Reg src = ra_alloc1(as, ref, RSET_FPR);
|
|
emit_fai(as, PPCI_STFD, src, RID_BASE, ofs);
|
|
+#endif
|
|
} else {
|
|
Reg type;
|
|
RegSet allow = rset_exclude(RSET_GPR, RID_BASE);
|
|
@@ -1811,6 +2041,10 @@ static void asm_stack_restore(ASMState *
|
|
if ((sn & (SNAP_CONT|SNAP_FRAME))) {
|
|
if (s == 0) continue; /* Do not overwrite link to previous frame. */
|
|
type = ra_allock(as, (int32_t)(*flinks--), allow);
|
|
+#if LJ_SOFTFP
|
|
+ } else if ((sn & SNAP_SOFTFPNUM)) {
|
|
+ type = ra_alloc1(as, ref+1, rset_exclude(RSET_GPR, RID_BASE));
|
|
+#endif
|
|
} else {
|
|
type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow);
|
|
}
|
|
@@ -1947,14 +2181,15 @@ static Reg asm_setup_call_slots(ASMState
|
|
int nslots = 2, ngpr = REGARG_NUMGPR, nfpr = REGARG_NUMFPR;
|
|
asm_collectargs(as, ir, ci, args);
|
|
for (i = 0; i < nargs; i++)
|
|
- if (args[i] && irt_isfp(IR(args[i])->t)) {
|
|
+ if (!LJ_SOFTFP && args[i] && irt_isfp(IR(args[i])->t)) {
|
|
if (nfpr > 0) nfpr--; else nslots = (nslots+3) & ~1;
|
|
} else {
|
|
if (ngpr > 0) ngpr--; else nslots++;
|
|
}
|
|
if (nslots > as->evenspill) /* Leave room for args in stack slots. */
|
|
as->evenspill = nslots;
|
|
- return irt_isfp(ir->t) ? REGSP_HINT(RID_FPRET) : REGSP_HINT(RID_RET);
|
|
+ return (!LJ_SOFTFP && irt_isfp(ir->t)) ? REGSP_HINT(RID_FPRET) :
|
|
+ REGSP_HINT(RID_RET);
|
|
}
|
|
|
|
static void asm_setup_target(ASMState *as)
|