From a95a32ce4cabb426ab7b487b55cef7466d851550 Mon Sep 17 00:00:00 2001 From: Christian Beier Date: Tue, 8 Jul 2014 14:49:31 +0200 Subject: [PATCH] gcc: Add patch that fixes GCC building for MIPS. Signed-off-by: Christian Beier --- .../gcc/patches/003-mpfr-longlong-mips.patch | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 devel/gcc/patches/003-mpfr-longlong-mips.patch diff --git a/devel/gcc/patches/003-mpfr-longlong-mips.patch b/devel/gcc/patches/003-mpfr-longlong-mips.patch new file mode 100644 index 000000000..0ab9fe503 --- /dev/null +++ b/devel/gcc/patches/003-mpfr-longlong-mips.patch @@ -0,0 +1,38 @@ +diff -Naurd mpfr-2.4.2-a/mpfr-longlong.h mpfr-2.4.2-b/mpfr-longlong.h +--- -a/mpfr-2.4.2/mpfr-longlong.h 2009-11-30 02:43:08.000000000 +0000 ++++ -b/mpfr-2.4.2/mpfr-longlong.h 2009-12-18 12:04:29.000000000 +0000 +@@ -1011,7 +1011,15 @@ + #endif /* __m88000__ */ + + #if defined (__mips) && W_TYPE_SIZE == 32 +-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 ++#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) ++#define umul_ppmm(w1, w0, u, v) \ ++ do { \ ++ UDItype _r; \ ++ _r = (UDItype) u * v; \ ++ (w1) = _r >> 32; \ ++ (w0) = (USItype) _r; \ ++ } while (0) ++#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 + #define umul_ppmm(w1, w0, u, v) \ + __asm__ ("multu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) + #else +@@ -1024,7 +1032,16 @@ + #endif /* __mips */ + + #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64 +-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 ++#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) ++typedef unsigned int UTItype __attribute__ ((mode (TI))); ++#define umul_ppmm(w1, w0, u, v) \ ++ do { \ ++ UTItype _r; \ ++ _r = (UTItype) u * v; \ ++ (w1) = _r >> 64; \ ++ (w0) = (UDItype) _r; \ ++ } while (0) ++#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 + #define umul_ppmm(w1, w0, u, v) \ + __asm__ ("dmultu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) + #else