From 79afc370f94cfcbb9104470aaf5b8433b829b0b4 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Sat, 11 Apr 2020 19:00:14 -0700 Subject: [PATCH] ffmpeg: add upstream patches fixing MIPS compilation Removed the Makefile references. Signed-off-by: Rosen Penev --- multimedia/ffmpeg/Makefile | 13 -- multimedia/ffmpeg/patches/020-drawtext.patch | 31 ++++ multimedia/ffmpeg/patches/030-h264-mips.patch | 16 ++ multimedia/ffmpeg/patches/040-aac-mips.patch | 141 ++++++++++++++++++ 4 files changed, 188 insertions(+), 13 deletions(-) create mode 100644 multimedia/ffmpeg/patches/020-drawtext.patch create mode 100644 multimedia/ffmpeg/patches/030-h264-mips.patch create mode 100644 multimedia/ffmpeg/patches/040-aac-mips.patch diff --git a/multimedia/ffmpeg/Makefile b/multimedia/ffmpeg/Makefile index 57dbadd15..333a8ef8a 100644 --- a/multimedia/ffmpeg/Makefile +++ b/multimedia/ffmpeg/Makefile @@ -410,12 +410,6 @@ FFMPEG_CONFIGURE+= \ --disable-armv5te \ --disable-armv6 \ --disable-armv6t2 \ - --disable-inline-asm \ - --disable-mipsdsp \ - --disable-mipsdspr2 \ - --disable-mipsfpu \ - --disable-msa \ - --disable-mmi \ --disable-fast-unaligned \ --disable-runtime-cpudetect @@ -428,13 +422,6 @@ FFMPEG_CONFIGURE+= \ --disable-altivec endif -# libavcodec/mips/aacdec_mips.c build problem -# XXX: disable use of assembly on MIPS. Patches welcome. -ifneq ($(findstring mips,$(CONFIG_ARCH)),) -FFMPEG_CONFIGURE+= \ - --disable-asm --disable-inline-asm -endif - # selectively disable optimizations according to arch/cpu type ifneq ($(findstring arm,$(CONFIG_ARCH)),) FFMPEG_CONFIGURE+= --enable-lto diff --git a/multimedia/ffmpeg/patches/020-drawtext.patch b/multimedia/ffmpeg/patches/020-drawtext.patch new file mode 100644 index 000000000..1b1887017 --- /dev/null +++ b/multimedia/ffmpeg/patches/020-drawtext.patch @@ -0,0 +1,31 @@ +From 8beb9e571ca6fb38d5f784bedd581398fb3da06f Mon Sep 17 00:00:00 2001 +From: Rosen Penev +Date: Mon, 6 Apr 2020 17:38:59 -0700 +Subject: [PATCH] avfilter/vf_drawtext: only test available exceptions + +soft float systems do not define these macros under musl. + +Fixes: Ticket7102 + +Signed-off-by: Rosen Penev +--- + libavfilter/vf_drawtext.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/libavfilter/vf_drawtext.c b/libavfilter/vf_drawtext.c +index 887a686d16d..abe1ca6c35c 100644 +--- a/libavfilter/vf_drawtext.c ++++ b/libavfilter/vf_drawtext.c +@@ -1083,10 +1083,12 @@ static int func_eval_expr_int_format(AVFilterContext *ctx, AVBPrint *bp, + + feclearexcept(FE_ALL_EXCEPT); + intval = res; ++#if defined(FE_INVALID) && defined(FE_OVERFLOW) && defined(FE_UNDERFLOW) + if ((ret = fetestexcept(FE_INVALID|FE_OVERFLOW|FE_UNDERFLOW))) { + av_log(ctx, AV_LOG_ERROR, "Conversion of floating-point result to int failed. Control register: 0x%08x. Conversion result: %d\n", ret, intval); + return AVERROR(EINVAL); + } ++#endif + + if (argc == 3) + av_strlcatf(fmt_str, sizeof(fmt_str), "0%u", positions); diff --git a/multimedia/ffmpeg/patches/030-h264-mips.patch b/multimedia/ffmpeg/patches/030-h264-mips.patch new file mode 100644 index 000000000..1626aa52d --- /dev/null +++ b/multimedia/ffmpeg/patches/030-h264-mips.patch @@ -0,0 +1,16 @@ +--- a/libavcodec/mips/cabac.h ++++ b/libavcodec/mips/cabac.h +@@ -28,6 +28,7 @@ + #include "libavutil/mips/mmiutils.h" + #include "config.h" + ++#ifndef __mips16 + #define get_cabac_inline get_cabac_inline_mips + static av_always_inline int get_cabac_inline(CABACContext *c, + uint8_t * const state){ +@@ -116,4 +117,5 @@ static av_always_inline int get_cabac_inline(CABACContext *c, + return bit; + } + ++#endif + #endif /* AVCODEC_MIPS_CABAC_H */ diff --git a/multimedia/ffmpeg/patches/040-aac-mips.patch b/multimedia/ffmpeg/patches/040-aac-mips.patch new file mode 100644 index 000000000..4605ca728 --- /dev/null +++ b/multimedia/ffmpeg/patches/040-aac-mips.patch @@ -0,0 +1,141 @@ +From 875ba2333340c2e13af370832e49c9371ffb0f91 Mon Sep 17 00:00:00 2001 +From: Rosen Penev +Date: Sun, 5 Apr 2020 20:37:10 -0700 +Subject: [PATCH] avcodec/aacdec: fix compilation under soft float MIPS + +Place HAVE_MIPSFPU further up so that functions that use floating point +ASM are defined away. Otherwise compilation failures result when soft +float in enabled on the toolchain. + +Signed-off-by: Rosen Penev +--- + libavcodec/mips/aacdec_mips.c | 4 ++-- + libavcodec/mips/aacpsdsp_mips.c | 4 ++-- + libavcodec/mips/aacsbr_mips.c | 4 ++-- + libavcodec/mips/sbrdsp_mips.c | 4 ++-- + 4 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/libavcodec/mips/aacdec_mips.c b/libavcodec/mips/aacdec_mips.c +index 01a2b3087ba..8e306529351 100644 +--- a/libavcodec/mips/aacdec_mips.c ++++ b/libavcodec/mips/aacdec_mips.c +@@ -59,6 +59,7 @@ + #include "libavutil/mips/asmdefs.h" + + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + static av_always_inline void float_copy(float *dst, const float *src, int count) + { + // Copy 'count' floats from src to dst +@@ -282,7 +283,6 @@ static void apply_ltp_mips(AACContext *ac, SingleChannelElement *sce) + } + } + +-#if HAVE_MIPSFPU + static av_always_inline void fmul_and_reverse(float *dst, const float *src0, const float *src1, int count) + { + /* Multiply 'count' floats in src0 by src1 and store the results in dst in reverse */ +@@ -433,9 +433,9 @@ static void update_ltp_mips(AACContext *ac, SingleChannelElement *sce) + void ff_aacdec_init_mips(AACContext *c) + { + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + c->imdct_and_windowing = imdct_and_windowing_mips; + c->apply_ltp = apply_ltp_mips; +-#if HAVE_MIPSFPU + c->update_ltp = update_ltp_mips; + #endif /* HAVE_MIPSFPU */ + #endif /* HAVE_INLINE_ASM */ +diff --git a/libavcodec/mips/aacpsdsp_mips.c b/libavcodec/mips/aacpsdsp_mips.c +index 83fdc2f9dbd..ef47e31a9ea 100644 +--- a/libavcodec/mips/aacpsdsp_mips.c ++++ b/libavcodec/mips/aacpsdsp_mips.c +@@ -57,6 +57,7 @@ + #include "libavutil/mips/asmdefs.h" + + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + static void ps_hybrid_analysis_ileave_mips(float (*out)[32][2], float L[2][38][64], + int i, int len) + { +@@ -187,7 +188,6 @@ static void ps_hybrid_synthesis_deint_mips(float out[2][38][64], + } + } + +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + static void ps_add_squares_mips(float *dst, const float (*src)[2], int n) + { +@@ -450,9 +450,9 @@ static void ps_stereo_interpolate_mips(float (*l)[2], float (*r)[2], + void ff_psdsp_init_mips(PSDSPContext *s) + { + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + s->hybrid_analysis_ileave = ps_hybrid_analysis_ileave_mips; + s->hybrid_synthesis_deint = ps_hybrid_synthesis_deint_mips; +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + s->add_squares = ps_add_squares_mips; + s->mul_pair_single = ps_mul_pair_single_mips; +diff --git a/libavcodec/mips/aacsbr_mips.c b/libavcodec/mips/aacsbr_mips.c +index 56aa4e86822..2e0cd723d7e 100644 +--- a/libavcodec/mips/aacsbr_mips.c ++++ b/libavcodec/mips/aacsbr_mips.c +@@ -58,6 +58,7 @@ + #define ENVELOPE_ADJUSTMENT_OFFSET 2 + + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + static int sbr_lf_gen_mips(AACContext *ac, SpectralBandReplication *sbr, + float X_low[32][40][2], const float W[2][32][32][2], + int buf_idx) +@@ -310,7 +311,6 @@ static int sbr_x_gen_mips(SpectralBandReplication *sbr, float X[2][38][64], + return 0; + } + +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + static void sbr_hf_assemble_mips(float Y1[38][64][2], + const float X_high[64][40][2], +@@ -611,9 +611,9 @@ static void sbr_hf_inverse_filter_mips(SBRDSPContext *dsp, + void ff_aacsbr_func_ptr_init_mips(AACSBRContext *c) + { + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + c->sbr_lf_gen = sbr_lf_gen_mips; + c->sbr_x_gen = sbr_x_gen_mips; +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + c->sbr_hf_inverse_filter = sbr_hf_inverse_filter_mips; + c->sbr_hf_assemble = sbr_hf_assemble_mips; +diff --git a/libavcodec/mips/sbrdsp_mips.c b/libavcodec/mips/sbrdsp_mips.c +index 1b0a10608de..83039fd802a 100644 +--- a/libavcodec/mips/sbrdsp_mips.c ++++ b/libavcodec/mips/sbrdsp_mips.c +@@ -59,6 +59,7 @@ + #include "libavutil/mips/asmdefs.h" + + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + static void sbr_qmf_pre_shuffle_mips(float *z) + { + int Temp1, Temp2, Temp3, Temp4, Temp5, Temp6; +@@ -165,7 +166,6 @@ static void sbr_qmf_post_shuffle_mips(float W[32][2], const float *z) + ); + } + +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + static void sbr_sum64x5_mips(float *z) + { +@@ -890,9 +890,9 @@ static void sbr_hf_apply_noise_3_mips(float (*Y)[2], const float *s_m, + void ff_sbrdsp_init_mips(SBRDSPContext *s) + { + #if HAVE_INLINE_ASM ++#if HAVE_MIPSFPU + s->qmf_pre_shuffle = sbr_qmf_pre_shuffle_mips; + s->qmf_post_shuffle = sbr_qmf_post_shuffle_mips; +-#if HAVE_MIPSFPU + #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 + s->sum64x5 = sbr_sum64x5_mips; + s->sum_square = sbr_sum_square_mips;