From 13014e3633c614a660bdc516d896c0a89be1f4e0 Mon Sep 17 00:00:00 2001
From: Yousong Zhou <yszhou4tech@gmail.com>
Date: Wed, 17 Aug 2016 09:52:58 +0800
Subject: [PATCH] libffi: patch n32.S to fix mips64 soft-float build

This should fix openwrt/packages#2511

Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
---
 .../patches/100-fix_mips_softfloat.patch      | 97 +++++++++++++++++++
 1 file changed, 97 insertions(+)

diff --git a/libs/libffi/patches/100-fix_mips_softfloat.patch b/libs/libffi/patches/100-fix_mips_softfloat.patch
index bdd5a9a43..09b91eff5 100644
--- a/libs/libffi/patches/100-fix_mips_softfloat.patch
+++ b/libs/libffi/patches/100-fix_mips_softfloat.patch
@@ -1,3 +1,97 @@
+From bfeac1b2d18b12c1c3c64a41a09c90f93d0ed4ca Mon Sep 17 00:00:00 2001
+From: Yousong Zhou <yszhou4tech@gmail.com>
+Date: Mon, 15 Aug 2016 15:00:13 +0800
+Subject: [PATCH] mips: fix MIPS softfloat build issue
+
+The patch for o32.S is taken from OpenWrt packages repo 3a7a4bf "libffi:
+fix MIPS softfloat build issue with current binutils"
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
+---
+ src/mips/n32.S | 17 +++++++++++++++++
+ src/mips/o32.S | 17 +++++++++++++++++
+ 2 files changed, 34 insertions(+)
+
+diff --git a/src/mips/n32.S b/src/mips/n32.S
+index c6985d3..8f25994 100644
+--- a/src/mips/n32.S
++++ b/src/mips/n32.S
+@@ -107,6 +107,16 @@ loadregs:
+ 
+ 	REG_L	t6, 3*FFI_SIZEOF_ARG($fp)  # load the flags word into t6.
+ 
++#ifdef __mips_soft_float
++	REG_L	a0, 0*FFI_SIZEOF_ARG(t9)
++	REG_L	a1, 1*FFI_SIZEOF_ARG(t9)
++	REG_L	a2, 2*FFI_SIZEOF_ARG(t9)
++	REG_L	a3, 3*FFI_SIZEOF_ARG(t9)
++	REG_L	a4, 4*FFI_SIZEOF_ARG(t9)
++	REG_L	a5, 5*FFI_SIZEOF_ARG(t9)
++	REG_L	a6, 6*FFI_SIZEOF_ARG(t9)
++	REG_L	a7, 7*FFI_SIZEOF_ARG(t9)
++#else
+ 	and	t4, t6, ((1<<FFI_FLAG_BITS)-1)
+ 	REG_L	a0, 0*FFI_SIZEOF_ARG(t9)
+ 	beqz	t4, arg1_next
+@@ -193,6 +203,7 @@ arg7_next:
+ arg8_doublep:	
+  	l.d	$f19, 7*FFI_SIZEOF_ARG(t9)	
+ arg8_next:	
++#endif
+ 
+ callit:		
+ 	# Load the function pointer
+@@ -214,6 +225,7 @@ retint:
+ 	b	epilogue
+ 
+ retfloat:
++#ifndef __mips_soft_float
+ 	bne     t6, FFI_TYPE_FLOAT, retdouble
+ 	jal	t9
+ 	REG_L	t4, 4*FFI_SIZEOF_ARG($fp)
+@@ -272,6 +284,7 @@ retstruct_f_d:
+ 	s.s	$f0, 0(t4)
+ 	s.d	$f2, 8(t4)
+ 	b	epilogue
++#endif
+ 
+ retstruct_d_soft:
+ 	bne	t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
+@@ -429,6 +442,7 @@ ffi_closure_N32:
+ 	REG_S	a6, A6_OFF2($sp)
+ 	REG_S	a7, A7_OFF2($sp)
+ 
++#ifndef __mips_soft_float
+ 	# Store all possible float/double registers.
+ 	s.d	$f12, F12_OFF2($sp)
+ 	s.d	$f13, F13_OFF2($sp)
+@@ -438,6 +452,7 @@ ffi_closure_N32:
+ 	s.d	$f17, F17_OFF2($sp)
+ 	s.d	$f18, F18_OFF2($sp)
+ 	s.d	$f19, F19_OFF2($sp)
++#endif
+ 
+ 	# Call ffi_closure_mips_inner_N32 to do the real work.
+ 	LA	t9, ffi_closure_mips_inner_N32
+@@ -458,6 +473,7 @@ cls_retint:
+ 	b	cls_epilogue
+ 
+ cls_retfloat:
++#ifndef __mips_soft_float
+ 	bne     v0, FFI_TYPE_FLOAT, cls_retdouble
+ 	l.s	$f0, V0_OFF2($sp)
+ 	b	cls_epilogue
+@@ -500,6 +516,7 @@ cls_retstruct_f_d:
+ 	l.s	$f0, V0_OFF2($sp)
+ 	l.d	$f2, V1_OFF2($sp)
+ 	b	cls_epilogue
++#endif
+ 	
+ cls_retstruct_small2:	
+ 	REG_L	v0, V0_OFF2($sp)
+diff --git a/src/mips/o32.S b/src/mips/o32.S
+index eb27981..429dd0a 100644
 --- a/src/mips/o32.S
 +++ b/src/mips/o32.S
 @@ -82,13 +82,16 @@ sixteen:
@@ -77,3 +171,6 @@
  1:	
  	REG_L	$3, V1_OFF2($fp)
  	REG_L	$2, V0_OFF2($fp)
+-- 
+2.6.4
+