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  1. commit ad84851746243d85f9be59703e9bee0f5c5f8eba
  2. Author: Willy Tarreau <w@1wt.eu>
  3. Date: Wed Feb 14 14:16:28 2018 +0100
  4. BUG/MEDIUM: threads: fix the double CAS implementation for ARMv7
  5. Commit f61f0cb ("MINOR: threads: Introduce double-width CAS on x86_64
  6. and arm.") introduced the double CAS. But the ARMv7 version is bogus,
  7. it uses the value of the pointers instead of dereferencing them. When
  8. lucky, it simply doesn't build due to impossible registers combinations.
  9. Otherwise it will immediately crash at run time when facing traffic.
  10. No backport is needed, this bug was introduced in 1.9-dev.
  11. (cherry picked from commit 41ccb194d1d14669e0592e5373ef5776f099e82a)
  12. [wt: backported only to keep safe code eventhough we don't use
  13. this function in 1.8]
  14. Signed-off-by: Willy Tarreau <w@1wt.eu>
  15. diff --git a/include/common/hathreads.h b/include/common/hathreads.h
  16. index 543ab95c..4e72848e 100644
  17. --- a/include/common/hathreads.h
  18. +++ b/include/common/hathreads.h
  19. @@ -766,7 +766,7 @@ __ha_barrier_full(void)
  20. __asm __volatile("dmb" ::: "memory");
  21. }
  22. -static __inline int __ha_cas_dw(void *target, void *compare, void *set)
  23. +static __inline int __ha_cas_dw(void *target, void *compare, const void *set)
  24. {
  25. uint64_t previous;
  26. int tmp;
  27. @@ -780,7 +780,7 @@ static __inline int __ha_cas_dw(void *target, void *compare, void *set)
  28. "cmpeq %1, #1;"
  29. "beq 1b;"
  30. : "=&r" (previous), "=&r" (tmp)
  31. - : "r" (compare), "r" (set), "r" (target)
  32. + : "r" (*(uint64_t *)compare), "r" (*(uint64_t *)set), "r" (target)
  33. : "memory", "cc");
  34. tmp = (previous == *(uint64_t *)compare);
  35. *(uint64_t *)compare = previous;