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  1. From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001
  2. From: BangLang Huang <banglang.huang@foxmail.com>
  3. Date: Wed, 9 Nov 2016 10:36:49 +0800
  4. Subject: [PATCH] libffi: fix MIPS softfloat build issue
  5. Backported from github.com/libffi/libffi#272
  6. Signed-off-by: BangLang Huang <banglang.huang@foxmail.com>
  7. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
  8. ---
  9. libffi/src/mips/n32.S | 17 +++++++++++++++++
  10. libffi/src/mips/o32.S | 17 +++++++++++++++++
  11. 2 files changed, 34 insertions(+)
  12. diff --git a/libffi/src/mips/n32.S b/libffi/src/mips/n32.S
  13. index c6985d30a6f..8f25994773c 100644
  14. --- a/libffi/src/mips/n32.S
  15. +++ b/libffi/src/mips/n32.S
  16. @@ -107,6 +107,16 @@ loadregs:
  17. REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
  18. +#ifdef __mips_soft_float
  19. + REG_L a0, 0*FFI_SIZEOF_ARG(t9)
  20. + REG_L a1, 1*FFI_SIZEOF_ARG(t9)
  21. + REG_L a2, 2*FFI_SIZEOF_ARG(t9)
  22. + REG_L a3, 3*FFI_SIZEOF_ARG(t9)
  23. + REG_L a4, 4*FFI_SIZEOF_ARG(t9)
  24. + REG_L a5, 5*FFI_SIZEOF_ARG(t9)
  25. + REG_L a6, 6*FFI_SIZEOF_ARG(t9)
  26. + REG_L a7, 7*FFI_SIZEOF_ARG(t9)
  27. +#else
  28. and t4, t6, ((1<<FFI_FLAG_BITS)-1)
  29. REG_L a0, 0*FFI_SIZEOF_ARG(t9)
  30. beqz t4, arg1_next
  31. @@ -193,6 +203,7 @@ arg7_next:
  32. arg8_doublep:
  33. l.d $f19, 7*FFI_SIZEOF_ARG(t9)
  34. arg8_next:
  35. +#endif
  36. callit:
  37. # Load the function pointer
  38. @@ -214,6 +225,7 @@ retint:
  39. b epilogue
  40. retfloat:
  41. +#ifndef __mips_soft_float
  42. bne t6, FFI_TYPE_FLOAT, retdouble
  43. jal t9
  44. REG_L t4, 4*FFI_SIZEOF_ARG($fp)
  45. @@ -272,6 +284,7 @@ retstruct_f_d:
  46. s.s $f0, 0(t4)
  47. s.d $f2, 8(t4)
  48. b epilogue
  49. +#endif
  50. retstruct_d_soft:
  51. bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
  52. @@ -429,6 +442,7 @@ ffi_closure_N32:
  53. REG_S a6, A6_OFF2($sp)
  54. REG_S a7, A7_OFF2($sp)
  55. +#ifndef __mips_soft_float
  56. # Store all possible float/double registers.
  57. s.d $f12, F12_OFF2($sp)
  58. s.d $f13, F13_OFF2($sp)
  59. @@ -438,6 +452,7 @@ ffi_closure_N32:
  60. s.d $f17, F17_OFF2($sp)
  61. s.d $f18, F18_OFF2($sp)
  62. s.d $f19, F19_OFF2($sp)
  63. +#endif
  64. # Call ffi_closure_mips_inner_N32 to do the real work.
  65. LA t9, ffi_closure_mips_inner_N32
  66. @@ -458,6 +473,7 @@ cls_retint:
  67. b cls_epilogue
  68. cls_retfloat:
  69. +#ifndef __mips_soft_float
  70. bne v0, FFI_TYPE_FLOAT, cls_retdouble
  71. l.s $f0, V0_OFF2($sp)
  72. b cls_epilogue
  73. @@ -500,6 +516,7 @@ cls_retstruct_f_d:
  74. l.s $f0, V0_OFF2($sp)
  75. l.d $f2, V1_OFF2($sp)
  76. b cls_epilogue
  77. +#endif
  78. cls_retstruct_small2:
  79. REG_L v0, V0_OFF2($sp)
  80. diff --git a/libffi/src/mips/o32.S b/libffi/src/mips/o32.S
  81. index eb279813a76..1aff4b14814 100644
  82. --- a/libffi/src/mips/o32.S
  83. +++ b/libffi/src/mips/o32.S
  84. @@ -82,13 +82,16 @@ sixteen:
  85. ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
  86. +#ifndef __mips_soft_float
  87. bnez t0, pass_d # make it quick for int
  88. +#endif
  89. REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the
  90. REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs.
  91. REG_L a2, 2*FFI_SIZEOF_ARG($sp)
  92. REG_L a3, 3*FFI_SIZEOF_ARG($sp)
  93. b call_it
  94. +#ifndef __mips_soft_float
  95. pass_d:
  96. bne t0, FFI_ARGS_D, pass_f
  97. l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
  98. @@ -130,6 +133,7 @@ pass_f_d:
  99. # bne t0, FFI_ARGS_F_D, call_it
  100. l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
  101. l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float
  102. +#endif
  103. call_it:
  104. # Load the function pointer
  105. @@ -158,14 +162,23 @@ retfloat:
  106. bne t2, FFI_TYPE_FLOAT, retdouble
  107. jalr t9
  108. REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
  109. +#ifndef __mips_soft_float
  110. s.s $f0, 0(t0)
  111. +#else
  112. + REG_S v0, 0(t0)
  113. +#endif
  114. b epilogue
  115. retdouble:
  116. bne t2, FFI_TYPE_DOUBLE, noretval
  117. jalr t9
  118. REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
  119. +#ifndef __mips_soft_float
  120. s.d $f0, 0(t0)
  121. +#else
  122. + REG_S v1, 4(t0)
  123. + REG_S v0, 0(t0)
  124. +#endif
  125. b epilogue
  126. noretval:
  127. @@ -261,9 +274,11 @@ $LCFI7:
  128. li $13, 1 # FFI_O32
  129. bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT
  130. +#ifndef __mips_soft_float
  131. # Store all possible float/double registers.
  132. s.d $f12, FA_0_0_OFF2($fp)
  133. s.d $f14, FA_1_0_OFF2($fp)
  134. +#endif
  135. 1:
  136. # Call ffi_closure_mips_inner_O32 to do the work.
  137. la t9, ffi_closure_mips_inner_O32
  138. @@ -281,6 +296,7 @@ $LCFI7:
  139. li $13, 1 # FFI_O32
  140. bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT
  141. +#ifndef __mips_soft_float
  142. li $9, FFI_TYPE_FLOAT
  143. l.s $f0, V0_OFF2($fp)
  144. beq $8, $9, closure_done
  145. @@ -288,6 +304,7 @@ $LCFI7:
  146. li $9, FFI_TYPE_DOUBLE
  147. l.d $f0, V0_OFF2($fp)
  148. beq $8, $9, closure_done
  149. +#endif
  150. 1:
  151. REG_L $3, V1_OFF2($fp)
  152. REG_L $2, V0_OFF2($fp)
  153. --
  154. 2.16.3